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001 /* Copyright (C) 2004 David Decotigny 002 003 This program is free software; you can redistribute it and/or 004 modify it under the terms of the GNU General Public License 005 as published by the Free Software Foundation; either version 2 006 of the License, or (at your option) any later version. 007 008 This program is distributed in the hope that it will be useful, 009 but WITHOUT ANY WARRANTY; without even the implied warranty of 010 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 011 GNU General Public License for more details. 012 013 You should have received a copy of the GNU General Public License 014 along with this program; if not, write to the Free Software 015 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, 016 USA. 017 */ 018 #ifndef _SOS_IDT_H_ 019 #define _SOS_IDT_H_ 020 021 /** 022 * @file idt.h 023 * 024 * Manage the x86 Interrupt Descriptor Table, the table which maps the 025 * hardware interrupt lines, hardware exceptions, and software 026 * interrupts, to software routines. We only define "interrupt gate" 027 * IDT entries. Don't use it directly; refer instead to interrupt.c, 028 * exceptions.c and syscall.c. 029 * 030 * @see Intel x86 doc, Vol 3, chapter 5 031 */ 032 033 #include <sos/errno.h> 034 #include <sos/types.h> 035 036 /* Mapping of the CPU exceptions in the IDT (imposed by Intel 037 standards) */ 038 #define SOS_EXCEPT_BASE 0 039 #define SOS_EXCEPT_NUM 32 040 #define SOS_EXCEPT_MAX (SOS_HWEXCEPT_BASE + SOS_HWEXCEPT_NUM - 1) 041 042 /* Mapping of the IRQ lines in the IDT */ 043 #define SOS_IRQ_BASE 32 044 #define SOS_IRQ_NUM 16 045 #define SOS_IRQ_MAX (SOS_IRQ_BASE + SOS_IRQ_NUM - 1) 046 047 /** 048 * Number of IDT entries. 049 * 050 * @note Must be large enough to map the hw interrupts, the exceptions 051 * (=> total is 48 entries), and the syscall(s). Since our syscall 052 * will be 0x42, it must be >= 0x43. Intel doc limits this to 256 053 * entries, we use this limit. 054 */ 055 #define SOS_IDTE_NUM 256 /* 0x100 */ 056 057 /** Initialization routine: all the IDT entries (or "IDTE") are marked 058 "not present". */ 059 sos_ret_t sos_idt_subsystem_setup(void); 060 061 /** 062 * Enable the IDT entry if handler_address != NULL, with the given 063 * lowest_priviledge.\ Disable the IDT entry when handler_address == 064 * NULL (the lowest_priviledge parameter is then ignored). Intel doc 065 * says that there must not be more than 256 entries. 066 * 067 * @note IRQ Unsafe 068 */ 069 sos_ret_t sos_idt_set_handler(int index, 070 sos_vaddr_t handler_address, 071 int lowest_priviledge /* 0..3 */); 072 073 074 /** 075 * @note IRQ Unsafe 076 * 077 * @return the handler address and DPL in the 2nd and 3rd 078 * parameters 079 */ 080 sos_ret_t sos_idt_get_handler(int index, 081 sos_vaddr_t *handler_address, 082 int *lowest_priviledge); 083 084 #endif /* _SOS_IDT_H_ */
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