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001 /* Copyright (C) 2004 David Decotigny 002 Copyright (C) 1999 Free Software Foundation, Inc. 003 004 This program is free software; you can redistribute it and/or 005 modify it under the terms of the GNU General Public License 006 as published by the Free Software Foundation; either version 2 007 of the License, or (at your option) any later version. 008 009 This program is distributed in the hope that it will be useful, 010 but WITHOUT ANY WARRANTY; without even the implied warranty of 011 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 012 GNU General Public License for more details. 013 014 You should have received a copy of the GNU General Public License 015 along with this program; if not, write to the Free Software 016 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, 017 USA. 018 */ 019 #ifndef _SOS_IDT_H_ 020 #define _SOS_IDT_H_ 021 022 /** 023 * @file idt.h 024 * 025 * Manage the x86 Interrupt Descriptor Table, the table which maps the 026 * hardware interrupt lines, hardware exceptions, and software 027 * interrupts, to software routines. We only define "interrupt gate" 028 * IDT entries. Don't use it directly; refer instead to interrupt.c, 029 * exceptions.c and syscall.c. 030 * 031 * @see Intel x86 doc, Vol 3, chapter 5 032 */ 033 034 #include <sos/errno.h> 035 #include <sos/types.h> 036 037 /* Mapping of the CPU exceptions in the IDT (imposed by Intel 038 standards) */ 039 #define SOS_EXCEPT_BASE 0 040 #define SOS_EXCEPT_NUM 32 041 #define SOS_EXCEPT_MAX (SOS_HWEXCEPT_BASE + SOS_HWEXCEPT_NUM - 1) 042 043 /* Mapping of the IRQ lines in the IDT */ 044 #define SOS_IRQ_BASE 32 045 #define SOS_IRQ_NUM 16 046 #define SOS_IRQ_MAX (SOS_IRQ_BASE + SOS_IRQ_NUM - 1) 047 048 /** 049 * Number of IDT entries. 050 * 051 * @note Must be large enough to map the hw interrupts, the exceptions 052 * (=> total is 48 entries), and the syscall(s). Since our syscall 053 * will be 0x42, it must be >= 0x43. Intel doc limits this to 256 054 * entries, we use this limit. 055 */ 056 #define SOS_IDTE_NUM 256 /* 0x100 */ 057 058 /** Initialization routine: all the IDT entries (or "IDTE") are marked 059 "not present". */ 060 sos_ret_t sos_idt_setup(void); 061 062 /** 063 * Enable the IDT entry if handler_address != NULL, with the given 064 * lowest_priviledge.\ Disable the IDT entry when handler_address == 065 * NULL (the lowest_priviledge parameter is then ignored). Intel doc 066 * says that there must not be more than 256 entries. 067 * 068 * @note IRQ Unsafe 069 */ 070 sos_ret_t sos_idt_set_handler(int index, 071 sos_vaddr_t handler_address, 072 int lowest_priviledge /* 0..3 */); 073 074 075 /** 076 * @note IRQ Unsafe 077 * 078 * @return the handler address and DPL in the 2nd and 3rd 079 * parameters 080 */ 081 sos_ret_t sos_idt_get_handler(int index, 082 sos_vaddr_t *handler_address, 083 int *lowest_priviledge); 084 085 #endif /* _SOS_IDT_H_ */
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