Diff markup

Differences between /hwcore/i8254.c (Article 2) and /hwcore/i8254.c (Article 6)

 /* Copyright (C) 2004  The KOS Team                /* Copyright (C) 2004  The KOS Team
    Copyright (C) 1999  Free Software Foundatio        Copyright (C) 1999  Free Software Foundation, Inc.
                                                    
    This program is free software; you can redi        This program is free software; you can redistribute it and/or
    modify it under the terms of the GNU Genera        modify it under the terms of the GNU General Public License
    as published by the Free Software Foundatio        as published by the Free Software Foundation; either version 2
    of the License, or (at your option) any lat        of the License, or (at your option) any later version.
                                                       
    This program is distributed in the hope tha        This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the         but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR        MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details        GNU General Public License for more details.
                                                       
    You should have received a copy of the GNU         You should have received a copy of the GNU General Public License
    along with this program; if not, write to t        along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 3        Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307,
    USA.                                               USA. 
 */                                                 */
 #include <hwcore/ioports.h>                        #include <hwcore/ioports.h>
                                                    
 #include "i8254.h"                                 #include "i8254.h"
                                                    
 /** 82c54 clock frequency */                       /** 82c54 clock frequency */
 #define I8254_MAX_FREQ 1193180                     #define I8254_MAX_FREQ 1193180
                                                    
 /* Ports to communicate with the 82c54 */          /* Ports to communicate with the 82c54 */
 #define I8254_TIMER0  0x40                         #define I8254_TIMER0  0x40
 #define I8254_TIMER1  0x41                         #define I8254_TIMER1  0x41
 #define I8254_TIMER2  0x42                         #define I8254_TIMER2  0x42
 #define I8254_CONTROL 0x43                         #define I8254_CONTROL 0x43
                                                    
 /**                                                /**
  * Configure the first timer of the 82c54 chip      * Configure the first timer of the 82c54 chip as a rate generator,
  * which will raise an IRQ0 on a regular perio      * which will raise an IRQ0 on a regular periodic basis, as given by
  * the freq parameter. Second (RAM refresh) an      * the freq parameter. Second (RAM refresh) and third (speaker) timers
  * are left unchanged. Maximum frequency is th      * are left unchanged. Maximum frequency is that of the 8254 clock, ie
  * 1193180 Hz.                                      * 1193180 Hz.
  *                                                  *
  * Ahhh PC systems are nice toys: this maximum      * Ahhh PC systems are nice toys: this maximum "strange" frequency
  * equals that of the NTSC clock (14.31818 MHz      * equals that of the NTSC clock (14.31818 MHz) divided by 12. In
  * turn, the famous 4.77 MHz cpu clock frequen      * turn, the famous 4.77 MHz cpu clock frequency of the first IBM PC
  * is this same NTSC frequency divided by 3. W      * is this same NTSC frequency divided by 3. Why the NTSC frequency as
  * a base "standard" ? Because the 14.31818 MH      * a base "standard" ? Because the 14.31818 MHz quartz were cheap at
  * that time, and because it allows to simply       * that time, and because it allows to simply drive altogether the
  * cpu, the "time of day" timer, and the video      * cpu, the "time of day" timer, and the video signal generators.
  */                                                 */
 sos_ret_t sos_i8254_set_frequency(unsigned int     sos_ret_t sos_i8254_set_frequency(unsigned int freq)
 {                                                  {
   unsigned int nb_tick;                              unsigned int nb_tick;
                                                    
   if (freq <= 0)                                     if (freq <= 0)
     return -SOS_EINVAL;                                return -SOS_EINVAL;
                                                    
   /* Compute counter value */                        /* Compute counter value */
   nb_tick = I8254_MAX_FREQ / freq;                   nb_tick = I8254_MAX_FREQ / freq;
                                                    
   /* Counter must be between 1 and 65536 */          /* Counter must be between 1 and 65536 */
   if (nb_tick > 65536)                               if (nb_tick > 65536)
     return -SOS_EINVAL;                                return -SOS_EINVAL;
   if (nb_tick <= 0)                                  if (nb_tick <= 0)
     return -SOS_EINVAL;                                return -SOS_EINVAL;
                                                    
   /* The i8254 interprets 0 to mean counter ==       /* The i8254 interprets 0 to mean counter == 65536, because 65536
      cannot be coded on 16bits */                       cannot be coded on 16bits */
   if (nb_tick == 65536)                              if (nb_tick == 65536)
     nb_tick = 0;                                       nb_tick = 0;
                                                      
   /* We want to configure timer0, we want to s       /* We want to configure timer0, we want to send both LSB+MSB to set
      timer0 freq (-> 0x30), and we configure t          timer0 freq (-> 0x30), and we configure timer0 in mode 2, ie as a
      rate generator (-> 0x4) ==> 0x34 */                rate generator (-> 0x4) ==> 0x34 */
   outb(0x34, I8254_CONTROL);                         outb(0x34, I8254_CONTROL);
                                                    
   /* Send LSB of counter first */                    /* Send LSB of counter first */
   outb((nb_tick & 0xFF), I8254_TIMER0);              outb((nb_tick & 0xFF), I8254_TIMER0);
                                                    
   /* Send MSB of counter */                          /* Send MSB of counter */
   outb((nb_tick >> 8) & 0xFF, I8254_TIMER0);         outb((nb_tick >> 8) & 0xFF, I8254_TIMER0);
                                                    
   return SOS_OK;                                     return SOS_OK;
 }                                                  }